Intel talks up next-generation chips

Intel expects its forthcoming Conroe and Merom chips to deliver a performance advantage of at least 20 percent over chips from AMD that are slated to be released at the same time.Merom and Conroe are expected to launch for notebooks and desktops, respectively, in the second half of this year.

The awkwardly titled Next-Generation Micro-Architecture is yet to receive a catchy name like Netburst, the Pentium 4 architecture it is replacing. Intel has already disclosed a few details about NGMA. It uses 14 pipeline stages instead of the 31 used by Intel's Pentium 4 processors. Information is processed through a processor's pipeline. The more stages in the pipeline, the less work each individual stage performs, requiring the chip to run very fast and therefore very hot. Intel has moved away from that design strategy in favour of smaller pipelines that do more work per stage, and can therefore run at slower clock speeds.

The microarchitecture also allows the processor to issue four instructions per clock, rather than three, as on Intel's current chips. It uses advanced branch prediction technology borrowed from the Pentium 4 designs. And chips built on that microarchitecture will also share the unified cache introduced with the Core Duo processor.Chips built with NGMA will use 4MB of cache memory.Unifying the caches on a dual-core processor improves performance by expanding the amount of cache each core can make use of, which will produce a huge improvement on single-threaded applications that only use a single core, he said.The combination of all those architectural changes will allow Intel to outperform AMD's planned offerings for the second half of 2006 without having to resort to adopting AMD's integrated memory controller design.

Intel has been hesitant to embrace the integrated memory controller since the failure of its last attempt to use such a design. Integrating the memory controller allows that vital gateway between the CPU and the memory to run at the speed of the processor, whisking data into the processor at high speed. But it also forces the processor to be designed specifically for a certain type of memory, which doomed Intel's Timna processor when its integrated memory controller was designed for Rambus' short-lived RDRAM standard.Instead, Intel will count on its microarchitectural improvements and a faster front-side bus to deliver the 20 percent improvement in performance over AMD's chips, based on standard benchmarks.

AMD is not planning any major architectural changes to its processors this year, but it does plan to introduce support for DDR2 memory. That memory standard can reach faster speeds than the current DDR memory used by AMD's chips, which will improve the performance of AMD-based systems.